As the complexity of integrated circuits evolve, greater demands are placed on increasing the density of circuit features to improve performance. To increase density, manufacturers must continually shrink the sizes of individual features in order to fit more features in a given space. In addition, three-dimensional features may be used to further progress the density of a given area of a substrate during semiconductor manufacturing. Multiple circuit layers may also be constructed to allow more and more features for a given area of the substrate. The addition of three dimensional features and multi-layered circuits may also require features with high aspect ratios that can be formed through many layers of the substrate to interconnect parts of the circuits. As the aspect ratios increase, the reliability of the features may be reduced if the production techniques, such as etching, cause imperfections in the features. A feature such as a hole or trench that is not properly formed may cause a decrease in density and reliability. Thus, the inventors have found that producing features with well-formed critical dimensions (CD) is crucial to meeting the ever increasing circuit density demands. Moreover, producing high aspect ratio features in multi-layered substrates that use alternating layers of silicon oxide and silicon nitride, such as in an ONON film stack, can prove challenging and costly in both resources and time.
Accordingly, the inventors have provided improved methods and apparatus for etching semiconductor structures on a substrate.